STMicroelectronics SPC572L series Reference Manual page 1462

LINFlexD
Field
Buffer Overrun Error Interrupt Enable
0 No interrupt
24
1 Interrupt enabled
BOIE
An interrupt is generated if this bit is set and the Buffer Overrun Flag (BOF) is set in LINESR or
UARTSR.
LIN state Interrupt enable
0 No interrupt
25
1 Interrupt generated on entering the following states: Sync Del, Sync Field, Identifier field,
Checksum
LSIE
Interrupt is generated only when entering the above fields. This interrupt can mainly be used for
debugging purposes. The interrupt has no status flag.
Wakeup interrupt enable
26
0 No interrupt
1 Interrupt enabled
WUIE
If this bit is set and the WUF in LINSR or UARTSR is set then an interrupt is generated.
Data Buffer Full Interrupt enable
27
0 No interrupt
1 Interrupt enabled
DBFIE
An interrupt is generated if this bit is set and the DBFF bit in LINSR is also set.
Data Buffer Empty Interrupt enable/Timeout Interrupt Enable
0 No interrupt
28
1 Interrupt enabled
DBEIE_TOIE
An interrupt is generated if this bit is set and LINSR[DBEF] status bit is set (in LIN mode) or if this
bit is set and UARTSR[TO] status bit is set (in UART mode).
Data Reception complete Interrupt enable
0 No interrupt
29
1 Interrupt enabled
DRIE
An interrupt is generated when this bit is set and Data Received flag (DRF) in LINSR or UARTSR
is set.
Data Transmitted Interrupt enable
0 No interrupt
30
1 Interrupt enabled
DTIE
An interrupt is generated when this bit is set and Data Transmitted flag (DTF) in LINSR or
UARTSR is set.
Header Received Interrupt
0 No interrupt
1 Interrupt enabled
31
An interrupt is generated when this bit is set and the Header Received flag (HRF) in LINSR is set.
HRIE
Note: If generic slave = 0, then this bit will always read a 0, and cannot be programmed.
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Table 827. LINIER field descriptions(Continued)
DocID027809 Rev 4
Description
RM0400