Table 845. Ifcr2N Field Descriptions - STMicroelectronics SPC572L series Reference Manual

RM0400
Field
Reserved
0–15
Read returns a 0.
Data Field Length
16–21
Number of data bytes in the response part of the frame.
DFL[5:0]
DFL[5:0] = Number of data bytes – 1
Direction
22
This bit controls the direction of the data field.
DIR
0 LINFlexD receives data and copies to the BDR registers
1 LINFlexD transmits data from the BDR registers
Classic Checksum
This bit controls the type of checksum applied on the current message.
23
0 Enhanced Checksum covering Identifier and Data fields
CCS
This is compatible with LIN specification rev. 2.0 and higher.
1 Classic Checksum covering Data field only
This is compatible with LIN specification 1.3 and lower.
Reserved
24–25
Forced to 0 by hardware.
26–31 Identifier
ID[5:0] Identifier part of the identifier field without the identifier parity.
50.4.2.21 Identifier Filter Control Register (IFCR2n+1)
This register is read-only in normal mode and can be programmed only in Initialization
mode. This register acts as a filter in Identifier list mode but acts as a mask for IFCR2n in
Identifier mask mode.
Address: (50+8×n) where n = 0 to no_of_filters
0 1
R 0 0
W
Reset 0 0
16 17
R
W
Reset 0 0
1
This field can be read in any modes and written only in Initialization mode.
2
Refer to device configuration chapter to see the number of filters used in the device

Table 845. IFCR2n field descriptions

2
/2–1
2 3 4 5
0 0 0 0
0 0 0 0
18 19 20 21
1
DFL
0 0 0 0
Figure 865. Identifier Filter Control Register (IFCR2n+1)
DocID027809 Rev 4
Description
6 7 8 9
0 0 0 0
0 0 0 0
22 23 24 25
0 0
1
DIR
0 0 0 0
Access: User read/write
10 11 12 13
0 0 0 0
0 0 0 0
26 27 28 29
1
ID
0 0 0 0
LINFlexD
14 15
0 0
0 0
30 31
0 0
1487/2058
1506