Table 847. Gcr Field Descriptions - STMicroelectronics SPC572L series Reference Manual

RM0400
Field
Reserved
0–25
Forced to 0 by hardware
Transmit data first bit MSBThis bit controls the first bit of transmit data (payload only) as
MSB/LSB in both UART and LIN modes.
26
0 The first bit of transmitted data is LSB — in other words, the first bit transmitted is mapped on
TDFBM LSB bit (BDR (0), BDR (8), BDR (16), BDR (24))
1 The first bit of transmitted data is MSB — in other words, the first bit transmitted is mapped on
MSB bit (BDR (7), BDR (15), BDR (23), BDR (31))
Received data first bit MSB
This bit controls the first bit of received data (payload only) as MSB/LSB both in UART and LIN
modes.
27
0 The first bit of received data is LSB — in other words, the first bit received is mapped on LSB
RDFBM
bit (BDR (0), BDR (8), BDR (16), BDR (24))
1 The first bit of received data is MSB — in other words, first bit received is mapped on MSB bit
(BDR (7), BDR (15), BDR (23), BDR (31))
Transmit data level inversion selection
This bit controls the data inversion of transmitted data (payload only) in both UART and LIN
28
modes.
TDLIS
0 Transmitted data is not inverted
1 Transmitted data is inverted
Received data level inversion selection
29
This bit controls the data inversion of received data (payload only) in both UART and LIN modes.
RDLIS
0 Received data is not inverted
1 Received data is inverted

Table 847. GCR field descriptions

Description
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