Embedded Flash Memory (Flash); Flash Introduction; Flash Main Features; Flash Functional Description - STMicroelectronics STM32WLEx Reference Manual

RM0461
3

Embedded flash memory (FLASH)

3.1

FLASH introduction

The flash memory interface manages the CPU AHB ICode and DCode accesses to the flash
memory. It implements the access, the erase and program flash memory operations, and
the read and write protection.
The flash memory interface accelerates code execution with a system of instruction prefetch
and cache lines.
3.2

FLASH main features

•
Up to 256 Kbytes of flash memory single bank architecture
•
Memory organization: 1 bank
–
–
•
72-bit wide data read (64 bits plus 8 ECC bits)
•
72-bit wide data write (64 bits plus 8 ECC bits)
•
Page erase (2 Kbytes) and mass erase
Flash memory interface features:
•
Flash memory read operations
•
Flash memory program/erase operations
•
Readout protection activated by option (RDP)
•
2 write protection areas selected by option (WRP)
•
2 proprietary code readout protection area selected by option (PCROP)
•
Flash empty check
•
Program and erase suspension feature
•
Prefetch on CPU ICODE
•
CPU instruction cache: 32 cache lines of 4 x 64 bits on ICode (1-Kbyte RAM)
•
CPU data cache: 8 cache lines of 4 x 64 bits on DCode (256-byte RAM)
•
Error code correction (ECC): 8 bits for 64-bit
•
Option byte loader
3.3

FLASH functional description

3.3.1

Flash memory organization

The flash memory is organized as 72-bit wide memory cells (64 bits plus 8 ECC bits) that
can be used for storing both code and data constants.
main memory: up to 256 Kbytes
page size: 2 Kbytes
RM0461 Rev 5
Embedded flash memory (FLASH)
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