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RM0400
Absolute
address
(hex)
FC0A_117E (DMA_TCD11_CSR)
TCD12 Source Address
FC0A_1180
(DMA_TCD12_SADDR)
TCD12 Transfer Attributes
FC0A_1184
(DMA_TCD12_ATTR)
TCD12 Signed Source Address Offset
FC0A_1186
(DMA_TCD12_SOFF)
(DMA_TCD12_NBYTES_MLNO)
FC0A_1188
(DMA_TCD12_NBYTES_MLOFFNO)
(DMA_TCD12_NBYTES_MLOFFYES)
FC0A_118C (DMA_TCD12_SLAST)
FC0A_1190 (DMA_TCD12_DADDR)
(DMA_TCD12_CITER_ELINKYES)
TCD12 Current Minor Loop Link, Major
FC0A_1194
Loop Count (Channel Linking Disabled)
(DMA_TCD12_CITER_ELINKNO)
FC0A_1196 (DMA_TCD12_DOFF)
FC0A_1198 (DMA_TCD12_DLASTSGA)
(DMA_TCD12_BITER_ELINKYES)
FC0A_119C
(DMA_TCD12_BITER_ELINKNO)
FC0A_119E (DMA_TCD12_CSR)
TCD13 Source Address
FC0A_11A0
(DMA_TCD13_SADDR)
TCD13 Transfer Attributes
FC0A_11A4
(DMA_TCD13_ATTR)
TCD13 Signed Source Address Offset
FC0A_11A6
(DMA_TCD13_SOFF)
(DMA_TCD13_NBYTES_MLNO)
FC0A_11A8
(DMA_TCD13_NBYTES_MLOFFNO)
(DMA_TCD13_NBYTES_MLOFFYES)
FC0A_11AC (DMA_TCD13_SLAST)
FC0A_11B0 (DMA_TCD13_DADDR)
(DMA_TCD13_CITER_ELINKYES)
TCD13 Current Minor Loop Link, Major
FC0A_11B4
Loop Count (Channel Linking Disabled)
(DMA_TCD13_CITER_ELINKNO)
FC0A_11B6 (DMA_TCD13_DOFF)
Table 164. DMA memory map(Continued)
Register name
DocID027809 Rev 4
Enhanced Direct Memory Access (eDMA)
Width
Access
(in bits)
16
R/W
32
R/W
16
R/W
16
R/W
32
R/W
32
R/W
32
R/W
32
R/W
32
R/W
16
R/W
16
R/W
16
R/W
32
R/W
16
R/W
16
R/W
16
R/W
32
R/W
16
R/W
16
R/W
32
R/W
32
R/W
32
R/W
32
R/W
32
R/W
16
R/W
16
R/W
16
R/W
Reset value
Location
000Xh
on page 427
0000_000Xh
on page 416
000Xh
on page 417
000Xh
on page 418
0000_000Xh
on page 419
0000_000Xh
on page 419
0000_000Xh
on page 420
0000_000Xh
on page 421
0000_000Xh
on page 422
000Xh
on page 422
000Xh
on page 423
000Xh
on page 424
0000_000Xh
on page 425
000Xh
on page 425
000Xh
on page 426
000Xh
on page 427
0000_000Xh
on page 416
000Xh
on page 417
000Xh
on page 418
0000_000Xh
on page 419
0000_000Xh
on page 419
0000_000Xh
on page 420
0000_000Xh
on page 421
0000_000Xh
on page 422
000Xh
on page 422
000Xh
on page 423
000Xh
on page 424
395/2058
449
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