Table 127. Siul2_Gpdo0–Siul2_Gpdo511 Field Description - STMicroelectronics SPC572L series Reference Manual

RM0400
Table 126. SIUL2_MSCR_MUX_512–SIUL2_MSCR_MUX_1023 field description
Field
17–23 Reserved
Source Signal Select—Selects which source signal is connected to the associated destination
(chip pin or module port). For a chip pin, the source signals are outputs from module ports. For a
24–31
module port, the source signals are either outputs from module ports or inputs from chip pins.
The meaning of each value depends on the destination. See <Cross Refs>Section 13.2.2.11.3,
SSS
"Chip-pin MSCR assignments and related
Module-port MSCR assignments and SSS
1. The SPC572Lx I/O Signal Description and Input Multiplexing Tables are contained in a Microsoft Excel
attached to this document.Locate the paperclip symbol on the left side of the PDF window, and click it. Double-click on the
Excel file to open it and select the I/O Signal Description Table tab.
13.2.2.11.3 Chip-pin MSCR assignments and related information
For chip-pin MSCR assignments, pin types, APC support, and SSS values, see the signal
description table in the "Signal description" chapter.
13.2.2.11.4 Module-port MSCR assignments and SSS values
For each internal module port that is or can be configured as an input and has more than
one possible source,
values and their corresponding source signals.
13.2.2.12 SIUL2 GPIO Pad Data Output Registers (SIUL2_GPDO0–SIUL2_GPDO511)
These registers can be used to set or clear a single GPIO pad with a byte access. See
Signal Description chapter for mapping of ports to GPDO registers.
Address: 0x1300–0x14FF
0
R 0
W
Reset 0
Figure 67. SIUL2 GPIO Pad Data Output registers (SIUL2_GPDO0–SIUL2_GPDO511)
Table 127. SIUL2_GPDO0–SIUL2_GPDO511 field description
Field
Pad Data Out—This bit stores the data to be driven out on the external GPIO pad controlled by
this register.
7
0 Logic low value is driven on the corresponding GPIO pad when the pad is configured as an
PDO[x] output
1 Logic high value is driven on the corresponding GPIO pad when the pad is configured as an
output
13.2.2.13 SIUL2 GPIO Pad Data Input Registers (SIUL2_GPDI0–SIUL2_GPDI511)
These registers can be used to read the GPIO pad data with a byte access. See Signal
Description chapter for mapping of ports to GPDI registers.
Chapter 4: Signal description
1 2
0 0
0 0
DocID027809 Rev 4
System Integration Unit Lite2 (SIUL2)
Description
information" and <Cross Refs>Section 13.2.2.11.4,
values."
shows the assigned MSCR, and the SSS
3 4
0 0
0 0
Description
(1)
(Continued)
®
workbook file
Access: User read/write
5 6
0 0
PDO
0 0
301/2058
7
[x]
0
308