Table 125. I/O Mscr Reset State Exceptions - STMicroelectronics SPC572L series Reference Manual

RM0400
Table 124. SIUL2_MSCR_IO_0–SIUL2_MSCR_IO_511 field description
Field
Input Buffer Enable—Used only when the associated destination is a chip pin. Enables the
12 associated pin's input buffer.
IBE 0 Disabled
1 Enabled
Input Hysteresis—Used only when the associated destination is a chip pin. Enables input
13 hysteresis for the associated pin.
HYS 0 Disabled
1 Enabled
Weak Pulldown Enable—Used only when the associated destination is a chip pin. Enables the
14 associated pin's weak pulldown resistor. It is OK for both WPDE and WPUE to be enabled.
WPDE 0 Disabled
1 Enabled
Weak Pullup Enable—Used only when the associated destination is a chip pin. Enables the
15 associated pin's weak pullup resistor. It is OK for both WPDE and WPUE to be enabled.
WPUE 0 Disabled
1 Enabled
Invert—Inverts the signal selected by SSS before transmitting it to the associated destination
16 (chip pin or module port).
INV 0 Don't invert
1 Invert
17–23 Reserved
Source Signal Select—Selects which source signal is connected to the associated destination
(chip pin or module port). For a chip pin, the source signals are outputs from module ports. For a
24–31
module port, the source signals are either outputs from module ports or inputs from chip pins.
The meaning of each value depends on the destination. See <Cross Refs>Section 13.2.2.11.3,
SSS
"Chip-pin MSCR assignments and related
Module-port MSCR assignments and SSS
1. The SPC572Lx I/O Signal Description and Input Multiplexing Tables are contained in a Microsoft Excel
attached to this document. Locate the paperclip symbol on the left side of the PDF window, and click it. Double-click on the
Excel file to open it and select the I/O Signal Description Table tab.
All bits and fields in the I/O MSCRs are applicable for all GPIO ports on the device. This
includes all ports on the device with digital output function. For ADC input ports with digital
input only (no output), the OERC, ODC, SMC, INV, and SSS bits/fields do not apply. The
SSS is always 8b0 for input only ports, enabling the general purpose input. The analog input
path is enabled in the ADC logic when the channel is selected for conversion.
The MSCR reset state given in
defaults to input/pull-up enabled. The exceptions to this are documented in
the SMC, HYS, WPDE, and WPUE bits have exceptions to the default MSCR reset value.
Port
PA[4]
PA[5]
PA[6]

Table 125. I/O MSCR reset state exceptions

Critical function
NMI
JCOMP
TCK
DocID027809 Rev 4
System Integration Unit Lite2 (SIUL2)
Description
information"
values."
Figure 65 applies to all GPIO pins on the devices, which
SMC HYS
1 0
1 1
1 1
(1)
(Continued)
and <Cross Refs>Section 13.2.2.11.4,
®
workbook file
SSS WPDE
— 1
0x0001 1
0x0001 1
Table 125. Only
WPUE
0
0
0
299/2058
308