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System Memory Protection Unit (SMPU)
Address Phase Signals
326/2058
Figure 83. SMPU block diagram
Slave Port n
Access
Evaluation
M acro
Access
Evaluation
M acro
Access
Evaluation
M acro
EA R
DocID027809 Rev 4
E D R
M ux
Internal
Peripheral Bus
R egion
D escriptor 0
R egion
D escriptor 1
R egion
D escriptor
RM0400
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