Table 126. Siul2_Mscr_Mux_512–Siul2_Mscr_Mux_1023 Field Description - STMicroelectronics SPC572L series Reference Manual

System Integration Unit Lite2 (SIUL2)
Port
PA[7]
PA[8]
PA[9]
PA[14]
PC[10:15]
PD[6:7]
PE[12]
PF[13]
13.2.2.11.2 Multiplexed Signal Configuration Registers for Multiplexed Input Selection
(SIUL2_MSCR_MUX_512–SIUL2_MSCR_MUX_1023)
The multiplexed input selection MSCR definition is given in
select the input source for IP blocks on the device that have inputs from multiple sources,
both other IP blocks and I/O pins. It is possible to configure the pad to be in input without
having to connect it externally. This is possible, either by enabling internal pull-up/pull-down
or disabling the input buffer (but in this case data is seen as 0 internally).
Address: 0X0A40–0x123C
0 1
R 0 0
W
Reset 0 0
16 17
R
INV
W
Reset 0 0
Figure 66. Multiplexed Signal Configuration Registers for Multiplexed Input Selection
Table 126. SIUL2_MSCR_MUX_512–SIUL2_MSCR_MUX_1023 field description
Field
0–15 Reserved
Invert—Inverts the signal selected by SSS before transmitting it to the associated destination
16 (chip pin or module port).
INV 0 Don't invert
1 Invert
300/2058
Table 125. I/O MSCR reset state exceptions(Continued)
Critical function
TMS
TDI
TDO
—
—
—
—
—
2 3 4 5
0 0 0 0
0 0 0 0
18 19 20 21
0 0 0 0
(SIUL2_MSCR_MUX_512–SIUL2_MSCR_MUX_1023)
DocID027809 Rev 4
SMC HYS
1 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
6 7 8 9
0 0 0 0
0 0 0 0
22 23 24 25
0 0 0 0
Description
SSS WPDE
0x0001 1
0x0001 0
0x0001 0
0
0
0
0
0
Figure 66. These registers
Access: User read/write
10 11 12 13
0 0 0 0
0 0 0 0
26 27 28 29
SSS
0 0 0 0
RM0400
WPUE
0
1
0
1
1
1
1
1
14 15
0 0
0 0
30 31
0 0
(1)