System Integration Unit Lite2 (Siul2); Introduction; Overview - STMicroelectronics SPC572L series Reference Manual

RM0400
13

System Integration Unit Lite2 (SIUL2)

13.1

Introduction

13.1.1

Overview

The System Integration Unit Lite2 (SIUL2) provides control over all the I/O ports on this
device and supports seven ports with 16 bits of bidirectional, general-purpose input and
output signals. It supports three external interrupts with trigger event configuration.
Figure 53
components for this device.
The module provides dedicated general-purpose pads that can be configured as either
inputs or outputs.
•
When configured as output, you can write to an internal register to control the state
driven on the associated output pad.
•
When configured as input, you can detect the state of the associated pad by reading
the value from an internal register.
•
When configured as input and output, the pad value can be read back, which can be
used as a method of checking if the written value appeared on the pad.
The different access mechanisms to the GPIO data registers aid in software development.
These differing mechanisms allow support for port access or for bit manipulation without the
need to use read-modify-write operations or a Power Architecture reservation access.
•
Access to two 16-bit ports in one access
•
Read/Write access to a single bit
• A 16-bit port write with a bit mask, using single 32-bit access
The external interrupt sources can be configured on MCU level to be used with any chip
pad. The three interrupt sources can be configured to have a digital filter to reject short
glitches on the inputs. The external interrupt/DMA requests map to the three EIRQ pins in
the device packages.
shows the block diagram of the SIUL2 module and its interfaces to other system
DocID027809 Rev 4
System Integration Unit Lite2 (SIUL2)
283/2058
308