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RM0400
Absolute
address
(hex)
Channel 10 Priority Register
FC0A_010A
(DMA_DCHPRI10)
Channel 11 Priority Register
FC0A_010B
(DMA_DCHPRI11)
Channel 12 Priority Register
FC0A_010C
(DMA_DCHPRI12)
Channel 13 Priority Register
FC0A_010D
(DMA_DCHPRI13)
Channel 14 Priority Register
FC0A_010E
(DMA_DCHPRI14)
Channel 15 Priority Register
FC0A_010F
(DMA_DCHPRI15)
FC0A_0110–
Reserved
FC0A_013F
Channel 0 Master ID Register
FC0A_0140
(DMA_DCHMID0)
Channel 1 Master ID Register
FC0A_0141
(DMA_DCHMID1)
Channel 2 Master ID Register
FC0A_0142
(DMA_DCHMID2)
Channel 3 Master ID Register
FC0A_0143
(DMA_DCHMID3)
Channel 4 Master ID Register
FC0A_0144
(DMA_DCHMID4)
Channel 5 Master ID Register
FC0A_0145
(DMA_DCHMID5)
Channel 6 Master ID Register
FC0A_0146
(DMA_DCHMID6)
Channel 7 Master ID Register
FC0A_0147
(DMA_DCHMID7)
Channel 8 Master ID Register
FC0A_0148
(DMA_DCHMID8)
Channel 9 Master ID Register
FC0A_0149
(DMA_DCHMID9)
Channel 10 Master ID Register
FC0A_014A
(DMA_DCHMID10)
Channel 11 Master ID Register
FC0A_014B
(DMA_DCHMID11)
Channel 12 Master ID Register
FC0A_014C
(DMA_DCHMID12)
Table 164. DMA memory map(Continued)
Register name
DocID027809 Rev 4
Enhanced Direct Memory Access (eDMA)
Width
Access
(in bits)
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
Reset value
Location
0Xh
on page 415
0Xh
on page 415
0Xh
on page 415
0Xh
on page 415
0Xh
on page 415
0Xh
on page 415
00h
on page 415
00h
on page 415
00h
on page 415
00h
on page 415
00h
on page 415
00h
on page 415
00h
on page 415
00h
on page 415
00h
on page 415
00h
on page 415
00h
on page 415
00h
on page 415
00h
on page 415
387/2058
449
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