Figure 81. Off-Platform Peripheral Access Control Registers (Aips_Opacra–Af) - STMicroelectronics SPC572L series Reference Manual

RM0400
Offset Register
0x0198 OPACRW
0x019C OPACRX
0x01A0 OPACRY
0x01A4 OPACRZ
0x01A8 OPACRAA
0x01AC OPACRAB
0x01B0 OPACRAC
0x01B4 OPACRAD
0x01B8 OPACRAE
0x01BC OPACRAF
Address: 0x140–1BC
0 1 2 3
R
OPACRn
W
Reset 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0
Figure 81. Off-Platform Peripheral Access Control Registers (AIPS_OPACRA–AF)
The OPACRn field is defined as in
R
W
Table 139. OPACR memory map(Continued)
[0:3] [4:7]
OPACR OPACR
176 177
OPACR OPACR
184 185
OPACR OPACR
192 193
OPACR OPACR
200 201
OPACR OPACR
208 209
OPACR OPACR
216 217
OPACR OPACR
224 225
OPACR OPACR
232 233
OPACR OPACR
240 241
OPACR OPACR
248 249
4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
OPACR OPACR
(n+1) (n+2)
0
0
DocID027809 Rev 4
[8:11] [12:15] [16:19]
OPACR OPACR OPACR
178 179
OPACR OPACR OPACR
186 187
OPACR OPACR OPACR
194 195
OPACR OPACR OPACR
202 203
OPACR OPACR OPACR
210 211
OPACR OPACR OPACR
218 219
OPACR OPACR OPACR
226 227
OPACR OPACR OPACR
234 235
OPACR OPACR OPACR
242 243
OPACR OPACR OPACR
250 251
OPACR OPACR
(n+3) (n+4)
Figure 82.
1
SP
Figure 82. OPACRn fields
Peripheral Bridge
[20:23] [24:27]
OPACR OPACR
180 181 182
OPACR OPACR
188 189 190
OPACR OPACR
196 197 198
OPACR OPACR
204 205 206
OPACR OPACR
212 213 214
OPACR OPACR
220 221 222
OPACR OPACR
228 229 230
OPACR OPACR
236 237 238
OPACR OPACR
244 245 246
OPACR OPACR
252 253 254
Access: Supervisor read/write
OPACR OPACR
(n+5) (n+6)
2
WP
[28:31]
OPACR
183
OPACR
191
OPACR
199
OPACR
207
OPACR
215
OPACR
223
OPACR
231
OPACR
239
OPACR
247
OPACR
255
OPACR
(n+7)
3
TP
323/2058
324