Off-Platform Peripheral Access Control Registers (Aips_Opacrx) - STMicroelectronics SPC572L series Reference Manual

RM0400
R
W
Field
0 Reserved, should be cleared
Supervisor protect
Determines whether the peripheral requires supervisor privilege level for access.
1
0 This peripheral does not require supervisor privilege level for accesses.
SP
1 This peripheral requires supervisor privilege level for accesses. The master privilege level must
indicate supervisor access attribute, and the MPROTn[MPL] control bit for the master must be set. If
not, the access is terminated with an error response and no peripheral access is initiated.
Write protect
Determines whether the peripheral allows write accesses.
2
0 This peripheral allows write accesses.
WP
1 This peripheral is write-protected. If a write access is attempted, the access is terminated with an error
response and no peripheral access is initiated.
Trusted protect
Determines whether the peripheral allows accesses from an untrusted master.
3
0 Accesses from an untrusted master are allowed.
TP
1 Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master,
the access is terminated with an error response and no peripheral access is initiated.
15.2.3

Off-Platform Peripheral Access Control Registers (AIPS_OPACRx)

Each of the off-platform peripherals has a four-bit OPACRn field which defines the access
levels supported by the given module. Eight OPACRs are grouped together to form a 32-bit
OPACRx register.
The peripheral assignments to each OPACR field are defined by the memory map slot to
which the peripherals are assigned. See
your particular device. If a peripheral is absent, the corresponding OPACR is not
implemented. Reads to the location return zeroes and writes are ignored.
Table 139
Offset Register
0x0140 OPACRA
0x0144 OPACRB
0x0148 OPACRC
0
0
Table 138. PACRn field descriptions
shows the top-level structure of the OPACR registers.
Table 139. OPACR memory map
[0:3] [4:7]
OPACR OPACR
0 1
OPACR
OPACR8
9
OPACR OPACR
16 17
DocID027809 Rev 4
1
SP
Figure 80. PACRn fields
Description
Chapter 5: Memory map
[8:11] [12:15] [16:19]
OPACR OPACR OPACR
2 3
OPACR OPACR OPACR
10 11
OPACR OPACR OPACR
18 19
Peripheral Bridge
2
WP
for the assignments for
[20:23] [24:27]
OPACR OPACR
4 5 6
OPACR OPACR
12 13 14
OPACR OPACR
20 21 22
3
TP
[28:31]
OPACR
7
OPACR
15
OPACR
23
321/2058
324