Table 120. Siul2_Ifeer0 Field Descriptions - STMicroelectronics SPC572L series Reference Manual

System Integration Unit Lite2 (SIUL2)
13.2.2.7 SIUL2 Interrupt Falling-Edge Event Enable Register 0 (SIUL2_IFEER0)
This register is used to enable falling-edge triggered events on the corresponding interrupt
pads.
Address: 0x0030
0 1
R 0 0
W
Reset 0 0
16 17
R 0 0
W
Reset 0 0
Figure 60. SIUL2 Interrupt Falling-Edge Event Enable Register 0 (SIUL2_IFEER0)
Field
0–20 Reserved
Enable falling-edge events to cause the EIF[x] bit to be set.
21
0 Falling-edge event is disabled
IFEE10
1 Falling-edge event is enabled
22–25 Reserved
Enable falling-edge events to cause the EIF[x] bit to be set.
26
0 Falling-edge event is disabled
IFEE5
1 Falling-edge event is enabled
27 Reserved
28–31
IFEE3
Enable falling-edge events to cause the EIF[x] bit to be set.
IFEE2
0 Falling-edge event is disabled
1 Falling-edge event is enabled
IFEE1
IFEE0
Note: If both IREE bit and IFEE bit are cleared for the same interrupt source, the interrupt status
flag for the corresponding external interrupt will never be set.
13.2.2.8 SIUL2 Interrupt Filter Enable Register 0 (SIUL2_IFER0)
This register is used to enable a digital filter counter on the corresponding interrupt pads to
filter out glitches on the inputs.
294/2058
2 3 4 5
0 0 0 0
0 0 0 0
18 19 20 21
0 0 0
IFEE
10
0 0 0 0

Table 120. SIUL2_IFEER0 field descriptions

DocID027809 Rev 4
6 7 8 9
0 0 0 0
0 0 0 0
22 23 24 25
0 0 0 0
0 0 0 0
Description
Access: User read/write
10 11 12 13
0 0 0 0
0 0 0 0
26 27 28 29
0
IFEE IFEE IFEE
5 3 2
0 0 0 0
RM0400
14 15
0 0
0 0
30 31
IFEE IFEE
1 0
0 0