Analog Pmc Interface - STMicroelectronics SPC572L series Reference Manual

RM0400
Field
0–15 Reserved.
TS2IE Interrupt Enable—Temperature Sensor input 2.
16
The MSB in IE_P must be set to access this bit.
TS2IE
0 No interrupt occurs.
1 An interrupt occurs.
TS1IE Interrupt Enable—Temperature Sensor input 1.
17
The MSB in IE_P must be set to access this bit.
TS1IE
0 No interrupt occurs.
1 An interrupt occurs.
TS0IE Interrupt Enable—Temperature Sensor input 0.
18
The MSB in IE_P must be set to access this bit.
TS0IE
0 No interrupt occurs.
1 An interrupt occurs.
19 Reserved.
TRIM_ADJ_OVER[3:0]—Customer adjustable over trim register.
20–23
These bits are a signed binary number that is added to the over temperature trim (NT_TD2)
TRIM_ADJ_OVER
value. The TRIM value is protected from overflows and underflows due to this addition.
24–25 Reserved.
TRIM_ADJ_UNDER[3:0]—Customer adjustable under trim register.
26–29
These bits are a signed binary number that is added to the under temperature trim value
TRIM_ADJ_UNDER
(NT_TD0). The TRIM value is protected from overflows and underflows due to this addition.
30
DOUT_EN. Digital Output Enable.
DOUT_EN
31
AOUT_EN. Analog Output Enable.
AOUT_EN
54.4

Analog PMC interface

The outputs from the PMC digital to the PMC analog circuit consist of trim registers for each
LVD circuit, an enable for each LVD (tied to the enabled state), and ADC channel select
controls. The ADC channel select controls are described in more detail in the ADC interface
section of this chapter, and in the Successive Approximation register Analog-to-Digital
Converter (SARADC) Ditigal Interface chapter.
The signals from the PMC analog to the PMC digital logic are the POR and LVD event
indication signals (both active high and active low, but only active low are used). These
signals are used by the PMC digital logic to create the appropriate resets for the rest of the
system.
There is a settling time for the analog voltage detect circuits specified at 5 microseconds.
The PMC digital counts clock edges after the loading of new flash trim values to verify that
this time has passed. This time can vary from 5 microseconds to 11.4 microseconds.
Power Management Controller digital interface (PMC_dig)
Table 916. CTL_TD field descriptions
DocID027809 Rev 4
Description
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