Table 902. Epr_Vd3 Field Descriptions - STMicroelectronics SPC572L series Reference Manual

RM0400
Field
0–27 Reserved.
LVD3_C low-voltage status flag—low voltage 1.08 V Core hot point supply.
IE_P[VD3IE_C] enables a low-voltage interrupt.
28 REE_VD3[LVD3_C] enables a system reset (which clears and negates the interrupt).
LVD3_C RES_VD3[LVD3_C] selects functional or destructive reset.
0 Currently no occurrence, or previously cleared by writing '1'.
1LVD occurrence detected.
29–31 Reserved.
54.3.1.6 Reset Event Enable register (REE_VD3)
This register controls whether the voltage detect signal event causes a reset. Setting this bit
causes a reset when the selected voltage passes the trigger event. These bits are loaded
from the Flash during boot and cannot be disabled (cleared) if enabled (set) when loaded.
Offset: PMC_BASE + 0x0034
0 1
R 0 0
W
Reset 0 0
16 17
R 0 0
W
Reset 0 0
Field
0–27 Reserved.
LVD3_C reset enable—LVD assertion on low voltage core 1.08 V hot point supply
28
RES_VD3[LVD3_C] selects functional or destructive reset.
LVD3_C
0 Disabled.
1 Enabled.
29–31 Reserved.
54.3.1.7 Reset Event Select register (RES_VD3)
This register controls whether the voltage detect signal event causes a destructive or
functional reset. These bits are loaded from the Flash during the boot sequence.
Power Management Controller digital interface (PMC_dig)

Table 902. EPR_VD3 field descriptions

2 3 4 5
0 0 0 0
0 0 0 0
18 19 20 21
0 0 0 0
0 0 0 0
Figure 941. Reset Event Enable register (REE_VD3)
Table 903. REE_VD3 field descriptions
DocID027809 Rev 4
Description
6 7 8 9
0 0 0 0
0 0 0 0
22 23 24 25
0 0 0 0
0 0 0 0
Description
Access: User read/write
10 11 12 13
0 0 0 0
0 0 0 0
26 27 28 29
0 0 0
0 0 1 0
14 15
0 0
0 0
30 31
0 0
0 0
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