Register Description - STMicroelectronics SPC572L series Reference Manual

Mode Entry Module (MC_ME)
Address
0x1C0 Core Status Register (ME_CS)
0x1C4 core_0 Control Register (ME_CCTL0)
core_0 Address Register
0x1E0
(ME_CADDR0)
Note: Any access to unused registers as well as write accesses to read-only registers:
• does not change register content
• causes a transfer error
56.3.2

Register Description

Unless otherwise noted, all registers may be accessed as 32-bit words, 16-bit half-words, or
8-bit bytes. The bytes are ordered according to big endian. For example, the ME_RUN_PC0
register may be accessed as a word at address 0x080, as a half-word at address 0x082, or
as a byte at address 0x083.
Some fields may be read-only, and their reset value of '1' or '0' and the corresponding
behavior cannot be changed.
56.3.2.1 Global Status Register (ME_GS)
Address 0x000
0 1 2
R S_CURRENT_MODE
W
Reset 0 0 0
16 17 18
R 0 0 0
W
Reset 0 0 0
This register contains global mode status.
1604/2058
Table 920. MC_ME register description(Continued)
Name
3 4 5 6
1 0
0 1 1 0
19 20 21 22
0 0 0 0
0 0 0 0
Figure 958. Global Status Register (ME_GS)
DocID027809 Rev 4
Access
Size
User Supervisor
word read
half
read read/write
word
word read read/write
Access: User read, Supervisor read, Test read
7 8 9 10
0 0 0
0 0 0 0
23 24 25 26
0 0
0 0 0 0
Location
Test
read read
read/write
read/write
11 12 13
0 0
1 0 0
27 28 29
S_SYSCLK
1 0 0
RM0400
on page
1626
on page
1627
on page
1628
14 15
S_FLA
1 1
30 31
0 0