External Signal Description - STMicroelectronics SPC572L series Reference Manual

RM0400
59.1.3.3 Bypass mode
When no test operation is required, the BYPASS instruction can be loaded to place the
JTAGC block into bypass mode. While in bypass mode, the single-bit bypass shift register is
used to provide a minimum-length serial path to shift data between TDI and TDO.
59.2

External signal description

The JTAGC consists of five signals that connect to off chip development tools and allow
access to test support functions. The JTAGC signals are outlined in the following table and
described in the following sections.
Name
TCK
TDI
TDO
TMS
JCOMP
1. TDO output buffer enable is negated when the JTAGC is not in the Shift-IR or Shift-DR states. A weak pull may be
implemented at the TDO pad for use when JTAGC is inactive.
59.2.1 TCK—Test clock input
Test Clock Input (TCK) is an input pin used to synchronize the test logic and control register
access through the TAP.
59.2.2 TDI—Test data input
Test Data Input (TDI) is an input pin that receives serial test instructions and data. TDI is
sampled on the rising edge of TCK.
59.2.3 TDO—Test data output
Test Data Output (TDO) is an output pin that transmits serial output for test instructions and
data. TDO is three-stateable and is actively driven only in the Shift-IR and Shift-DR states of
the TAP controller state machine, which is described in
machine.
59.2.4 TMS—Test mode select
Test Mode Select (TMS) is an input pin used to sequence the IEEE 1149.1-2001 test control
state machine. TMS is sampled on the rising edge of TCK.
59.2.5 JCOMP—JTAG compliancy
The JCOMP signal provides IEEE 1149.1-2001 compatibility and provides the ability to
share the TAP. The JTAGC TAP controller is enabled when JCOMP is set to the JTAGC
enable encoding, otherwise the JTAGC TAP controller remains in reset.
Table 967. JTAG signal properties
I/O
Input
Input
Output
Input Test Mode Select
Input JTAG Compliancy
DocID027809 Rev 4
Function
Test Clock
Test Data In
Test Data Out
JTAG Controller (JTAGC)
Reset State
—
—
(1)
High Z
—
—
Section 59.4.3, TAP controller state
Pull
Down
Up
—
Up
Down
1733/2058
1742