Table 926. Invalid Mode Transition Status Register (Me_Imts) Field Descriptions - STMicroelectronics SPC572L series Reference Manual

RM0400
Table 925. Interrupt Mask Register (ME_IM) field descriptions(Continued)
Field
Invalid mode interrupt mask
29
0 Invalid mode interrupt is masked
M_IMODE
1 Invalid mode interrupt is enabled
SAFE
30
0 SAFE
M_SAFE
1 SAFE
Mode transition complete interrupt mask
31
0 Mode transition complete interrupt is masked
M_MTC
1 Mode transition complete interrupt is enabled
56.3.2.6 Invalid Mode Transition Status Register (ME_IMTS)
Address 0x014
0 1 2
R 0 0 0
W
Reset 0 0 0
16 17 18
R 0 0 0
W
Reset 0 0 0
Figure 963. Invalid Mode Transition Status Register (ME_IMTS)
This register provides the status bits for the possible causes of an invalid mode interrupt.

Table 926. Invalid Mode Transition Status Register (ME_IMTS) field descriptions

Field
0–26
Reserved
Mode Transition Illegal status — This bit is set whenever a new mode is requested while some
other mode transition process is active (S_MTRANS is '1'). Please refer to <Cross
27 Refs>Section 56.4.5, "Mode Transition Interrupts for the exceptions to this behavior. It is cleared by
writing a '1' to this bit.
S_MTI
0 Mode transition requested is not illegal
1 Mode transition requested is illegal
Mode Request Illegal status — This bit is set whenever the target mode requested is not a valid
28 mode with respect to current mode. It is cleared by writing a '1' to this bit.
S_MRI 0 Target mode requested is not illegal with respect to current mode
1 Target mode requested is illegal with respect to current mode
mode interrupt mask
mode interrupt is masked
mode interrupt is enabled
3 4 5
0 0 0
0 0 0
19 20 21
0 0 0
0 0 0
Description
Access: User read, Supervisor read/write, Test read/write
6 7 8 9
0 0 0 0
0 0 0 0
22 23 24 25
0 0 0 0
0 0 0 0
Description
DocID027809 Rev 4
Mode Entry Module (MC_ME)
10 11 12 13
0 0 0 0
0 0 0 0
26 27 28 29
0
w1c w1c w1c
0 0 0 0
14 15
0 0
0 0
30 31
w1c w1c
0 0
1611/2058
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