Mode Entry Module (MC_ME)
Table 928. Mode Configuration Registers (ME_<mode>_MC) field descriptions(Continued)
Field
14–15
Flash power-down control — This bit specifies the operating mode of the code flash after entering
FLAON
this mode.
00 reserved
01 Flash is in power-down mode
10 Flash is in low-power mode
11 Flash is in normal mode
16–24
Reserved
primary PLL control
25
0 primary PLL is switched off
PLL0ON
1 primary PLL is switched on
external crystal oscillator control
26
0 external crystal oscillator is switched off
XOSCON
1 external crystal oscillator is switched on
16 MHz internal RC oscillator control
27
0 16 MHz internal RC oscillator is switched off
IRCON
1 16 MHz internal RC oscillator is switched on
System clock switch control — These bits specify the system clock to be used by the system.
0000 16 MHz internal RC oscillator
0001 external crystal oscillator
28-31
0010 PLL0 PHI
SYSCLK
0011 PLL0 PHI1
0100 – 1110 reserved
1111 system clock is disabled in
1620/2058
Description
TEST
mode, reserved in all other modes
DocID027809 Rev 4
RM0400
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