Table 941. Dbcr2 Field Descriptions - STMicroelectronics SPC572L series Reference Manual

e200z215An3 Core Debug Support
57.3.2.3 Debug Control Register 2 (DBCR2)
Debug Control Register 2 is used to configure Data Address Compare and Data Value
Compare operation.The DBCR2 register is shown in
0 1 2 3 4 5 6
1. Reset by processor reset p_reset_b if EDBCR0
EDBRAC0 masks off hardware-owned resources from reset by p_reset_b and only software-owned resources indicated by
EDBRAC0 will be reset by p_reset_b.
Table 941
Bit Name
Data Address Compare 1 User/Supervisor Mode
00 DAC1 debug events not affected by MSR
0:1 DAC1US
01 Reserved
10 DAC1 debug events can only occur if MSR
11 DAC1 debug events can only occur if MSR
Data Address Compare 1 Effective/Real Mode
00 DAC1 debug events are based on effective address
2:3 DAC1ER
01 Unimplemented (Book E real address compare), no match can occur
10 DAC1 debug events are based on effective address and can only occur if MSR
11 DAC1 debug events are based on effective address and can only occur if MSR
Data Address Compare 2 User/Supervisor Mode
00 DAC2 debug events not affected by MSR
4:5 DAC2US
01 Reserved
10 DAC2 debug events can only occur if MSR
11 DAC2 debug events can only occur if MSR
Data Address Compare 2 Effective/Real Mode
00 DAC2 debug events are based on effective address
6:7 DAC2ER
01 Unimplemented (Book E real address compare), no match can occur
10 DAC2 debug events are based on effective address and can only occur if MSR
11 DAC2 debug events are based on effective address and can only occur if MSR
1662/2058
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
SPR - 310; Read/Write; Reset
Figure 990. DBCR2 register
EDM
provides bit definitions for Debug Control Register 2.

Table 941. DBCR2 field descriptions

DocID027809 Rev 4
Figure
DVC1BE
(1)
- 0x0
=0, as well as unconditionally by m_por. If EDBCR0
Description
PR
=0 (Supervisor mode)
PR
=1 (User mode)
PR
PR
=0 (Supervisor mode)
PR
=1. (User mode)
PR
990.
DVC2BE
=1,
EDM
RM0400
=0
DS
=1
DS
=0
DS
=1
DS