STMicroelectronics SPC572L series Reference Manual page 1761

RM0400
Table 978. TAP.7 controller register list (managed with commands)(Continued)
Register type
Read-only
M = Mandatory register
O = Optional register
60.6.2.3 Registers
60.6.2.3.1 Exit Control Level (ECL)
Storing this register zeroes the ZBS count and unlocks the control level.
This register is set using the STMC command. It remains logic 1 only momentarily before
immediately returning to logic 0.
This register is cleared by a global register load.
60.6.2.3.2 Suspend (SUSPEND)
Setting this register suspends the use of control levels. When this register is a logic 1, the
"System Path" (STL) is used.
•
1 – Suspend use of control levels. Enables "System Path."
•
0 – Enable use of control levels.
SUSPEND is set with the STMC command.
This register is cleared when 8 consecutive ZBSs are detected without the locking of the
ZBS count.
This register is cleared by a global register load.
60.6.2.3.3 ZBS Inhibit (ZBSINH)
Storing to ZBSINH inhibits ZBS detection.
•
1 – Inhibit ZBS detection.
•
0 – Enable ZBS detection.
ZBSINH is set with the STMC command.
This register is cleared by a global register load.
60.6.2.3.4 Scan Format (SCNFMT[4:0])
Set using Store Scan Format (STFMT) command.
Read using Scan String (SCNS) command.
IEEE 1149.7 Compact JTAG Test Access Port Controller (CJTAG)
Global/
Width
local
Local 32
32
DocID027809 Rev 4
Register
mnemonic
RDBACK0 Read-back 0
CNFG0 Configuration Register 0
Name
1761/2058
1795