STMicroelectronics SPC572L series Reference Manual page 1693

RM0400
Bit Name
2 DNH
3 —
4 ICMP
5 BRT
6 IRPT
7 TRAP
8 IAC
9:11 —
12 DACR
13 DACW
14 —
15 DNI
16 RET
17:20 —
21 DEVT1
22 DEVT2
23 PMI
24 —
25 CIRPT
26 CRET
22:31 —
Table 954. EDBSRMSK0 field descriptions (Continued)
Debugger Notify Halt Event
Set to 1 to mask debug mode entry by EDBSR0
Reserved
Instruction Complete Debug Event
Set to 1 to mask debug mode entry by EDBSR0
Branch Taken Debug Event
Set to 1 to mask debug mode entry by EDBSR0
Interrupt Taken Debug Event
Set to 1 to mask debug mode entry by EDBSR0
Trap Taken Debug Event
Set to 1 to mask debug mode entry by EDBSR0
Instruction Address Compare Debug Event
Set to 1 to mask debug mode entry by EDBSR0
Reserved
Data Address Compare 1 Read Debug Event
Set to 1 to mask debug mode entry by EDBSR0
Data Address Compare 1 Write Debug Event
Set to 1 to mask debug mode entry by EDBSR0
Reserved
DNI Debug Event
Set to 1 to mask debug mode entry by EDBSR0
Return Debug Event
Set to 1 to mask debug mode entry by EDBSR0
Reserved
External Debug Event 1 Debug Event
Set to 1 to mask debug mode entry by EDBSR0
External Debug Event 2 Debug Event
Set to 1 to mask debug mode entry by EDBSR0
Performance Monitor Interrupt Debug Event
Set to 1 to mask debug mode entry by EDBSR0
Reserved
Critical Interrupt Taken Debug Event
Set to 1 to mask debug mode entry by EDBSR0
Critical Return Debug Event
Set to 1 to mask debug mode entry by EDBSR0
Reserved
DocID027809 Rev 4
e200z215An3 Core Debug Support
Description
DNH
ICMP
BRT
IRPT
TRAP
IAC
DACR
DACW
DNI
RET
DEVT1
DEVT2
PMI
CIRPT
CRET
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