Table 908. Epr_Vd14 Field Descriptions - STMicroelectronics SPC572L series Reference Manual

Power Management Controller digital interface (PMC_dig)
Offset: PMC_BASE + 0x00E0
0 1
R 0 0
W
Reset 0 0
16 17
R 0 0
W
Reset 0 0
Field
0–8 Reserved.
LVD14_A low-voltage status flag—high voltage 4 V ADC supply.
IE_P[VD14IE_A] enables a low-voltage interrupt.
9
REE_VD14[LVD14_A] enables a system reset (which clears and negates the interrupt).
LVD14_A
RES_VD14[LVD14_A] selects functional or destructive reset.
0 Currently no occurrence, or previously cleared by writing '1'.
1 LVD occurrence detected on the high voltage ADC supply.
LVD14_IM low-voltage status flag—high voltage 4 V I/O Main supply.
IE_P[VD14IE_IM] enables a low-voltage interrupt.
10
REE_VD14[LVD14_IM] enables a system reset (which clears and negates the interrupt).
LVD14_IM
RES_VD14[LVD14_IM] selects functional or destructive reset.
0 Currently no occurrence, or previously cleared by writing '1'.
1 LVD occurrence detected on the high voltage I/O Main supply.
11–31 Reserved.
54.3.1.13 Reset Event Enable register (REE_VD14)
This Reset Event Enable register controls whether the voltage detect signal event causes a
reset. These bits are loaded from the Flash during boot and cannot be disabled (cleared) if
enabled (set) when loaded.
1584/2058
2 3 4 5
0 0 0 0
0 0 0 0
18 19 20 21
0 0 0 0
0 0 0 0
Figure 946. Event Pending register (EPR_VD14)

Table 908. EPR_VD14 field descriptions

DocID027809 Rev 4
6 7 8 9
0 0 0
w1c
0 0 0 0
22 23 24 25
0 0 0 0
0 0 0 0
Description
Access: User read/write
10 11 12 13
0 0 0
w1c
0 0 0 0
26 27 28 29
0 0 0 0
0 0 0 0
RM0400
14 15
0 0
0 0
30 31
0 0
0 0