Table 948. Edbrac0 Field Descriptions - STMicroelectronics SPC572L series Reference Manual

e200z215An3 Core Debug Support
Bit Name
0 — Reserved
Internal Debug Mode control. When EDBRAC0
bits in DBCR0–8 via mtspr are ignored.
0 Internal Debug mode may not be enabled by software. DBCR0
1 IDM
1 Internal Debug mode may be enabled by software. DBCR0
Reset Field Control
0 DBCR0
2 RST
1 DBCR0
Unconditional Debug Event
3 UDE
0 Event owned by hardware debug.
1 Event owned by software debug.
Instruction Complete Debug Event
4 ICMP
0 Event owned by hardware debug. No mtspr access by software to DBCR0
1 Event owned by software debug. DBCR0
Branch Taken Debug Event
5 BRT
0 Event owned by hardware debug. No mtspr access by software to DBCR0
1 Event owned by software debug. DBCR0
Interrupt Taken Debug Event
6 IRPT
0 Event owned by hardware debug. No mtspr access by software to DBCR0
1 Event owned by software debug. DBCR0
Trap Taken Debug Event
7 TRAP
0 Event owned by hardware debug. No mtspr access by software to DBCR0
1 Event owned by software debug. DBCR0
Instruction Address Compare 1 Debug Event
0 Event owned by hardware debug. No mtspr access by software to IAC1 control and status
8 IAC1
1 Event owned by software debug. IAC1 control fields are software readable/writable.
Instruction Address Compare 2 Debug Event
0 Event owned by hardware debug. No mtspr access by software to IAC2 control and status
9 IAC2
1 Event owned by software debug. IAC2 control fields are software readable/writable.
Instruction Address Compare 3 Debug Event
0 Event owned by hardware debug. No mtspr access by software to IAC3 control and status
10 IAC3
1 Event owned by software debug. IAC3 control fields are software readable/writable.
Instruction Address Compare 4 Debug Event
0 Event owned by hardware debug. No mtspr access by software to IAC4 control and status
11 IAC4
1 Event owned by software debug. IAC4 control fields are software readable/writable.
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Table 948. EDBRAC0 field descriptions

hardware. mtspr DBCR0–8 and other debug registers is always ignored. No resource
sharing occurs, regardless of the settings of other fields in EDBRAC0. Hardware
exclusively owns all resources.
DBCR0 is software readable/writable.
IDM
owned exclusively by hardware debug. No mtspr access by software to
RST
DBCR0 field.
RST
accessible by software debug. DBCR0
RST
fields.
fields.
fields.
fields.
DocID027809 Rev 4
Description
=1, software writes to hardware-owned
IDM
IDM
is software readable/writable.
RST
is software readable/writable.
ICMP
is software readable/writable.
BRT
is software readable/writable.
IRPT
is software readable/writable.
TRAP
RM0400
is owned exclusively by
IDM
is owned by software.
field.
ICMP
field.
BRT
field.
IRPT
field.
TRAP