STMicroelectronics SPC572L series Reference Manual page 1739

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RM0400
Instruction
Factory test reserved
ACCESS_AUX_JDC
ACCESS_AUX_CORE_0
ACCESS_AUX_CORE_2
ACCESS_AUX_GTM
ACCESS_AUX_BUS_MON_0
ACCESS_AUX_BUS_MON_1
ACCESS_AUX_SPU_A
ACCESS_AUX_PARALLEL
BYPASS
(2)
Reserved
1. The use of this instruction is limited to the synchronous exit of debug mode via the execution of the GO+EXIT OnCE
command. The execution of other instructions or commands is not supported
2. The manufacturer reserves the right to change the decoding of reserved instruction codes in the future
Table 970. 6-bit JTAG instructions(Continued)
Code[5:0]
Reserved
100010
Reserved
100011
Reserved
100100
100101
100110
Reserved
100111
101000
Reserved
101001
101010
Reserved
101011
Reserved
101100
Reserved
101101
Reserved
101110
Reserved
101111
Reserved
110000
Reserved
110001
Reserved
110010
110011
110100
110101
Reserved
110110
Reserved
110111
Reserved
111000
Reserved
111001
111010
Reserved
111011
(1)
111100
Reserved
111101
Reserved
111110
111111
All other opcodes
DocID027809 Rev 4
Instruction Summary
Reserved
Reserved
Reserved
Intended for factory test only
Enables access to the JDC TAP controller
Reserved
Enabled access to E200 Core 0
Reserved
Enables access to E200 Core 2
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Enables access to GTM TAP controller
Enables access to NXMC Client 0 TAP controller
Enables access to NXMC Client 1 TAP controller
Reserved
Reserved
Reserved
Reserved
Enables access to SPU Client TAP controller
Reserved
Enables access to all cores in parallel
Reserved
Reserved
Selects bypass register for data operations
Decoded to select bypass register
JTAG Controller (JTAGC)
1739/2058
1742

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