Figure 959. Mode Control Register (Me_Mctl) - STMicroelectronics SPC572L series Reference Manual

Mode Entry Module (MC_ME)
Table 921. Global Status Register (ME_GS) field descriptions(Continued)
Field
external crystal oscillator status
26
0 external crystal oscillator is not stable
S_XOSC
1 external crystal oscillator is providing a stable clock
16 MHz internal RC oscillator status
27
0 16 MHz internal RC oscillator is not stable
S_IRC
1 16 MHz internal RC oscillator is providing a stable clock
System clock switch status — These bits specify the system clock currently used by the system.
0000 16 MHz internal RC oscillator
0001 external crystal oscillator
28–31
0010 PLL0 PHI
S_SYSCLK
0011 PLL0 PHI1
0100 – 1110 reserved
1111 system clock is disabled
56.3.2.2 Mode Control Register (ME_MCTL)
Address 0x004
0 1 2
R
TARGET_MODE
W
Reset 0 0 1
16 17 18
R 1 0 1
W
Reset 1 0 1
This register is used to trigger software-controlled mode changes. Depending on the modes
as enabled by ME_ME register bits, configurations corresponding to unavailable modes are
reserved and access to ME_<mode>_MC registers must respect this for successful mode
requests.
Note: Byte and half-word write accesses are not allowed for this register as a predefined key is
required to change its value.
1606/2058
3 4 5 6
0 0 0
1 0 0 0
19 20 21 22
0 0 1 0
0 0 1 0

Figure 959. Mode Control Register (ME_MCTL)

DocID027809 Rev 4
Description
Access: User read, Supervisor read/write, Test read/write
7 8 9 10
0 0 0 0
0 0 0 0
23 24 25 26
1 0 0 0
KEY
1 0 0 0
RM0400
11 12 13 14
0 0 0 0
0 0 0 0
27 28 29 30
0 1 1 1
0 1 1 1
15
0
0
31
1
1