Table 965. Nexus Reset Truth Table - STMicroelectronics SPC572L series Reference Manual

Debug and Calibration Interface (DCI)
functions without affecting any system level functions. The DCI provides the reset signal for
all Nexus blocks. This reset is controlled using the following signals:
•
Power-on reset/Low voltage detect
•
JCOMP
•
SoC Debug_Enable signal
•
System PLL is out of lock state and not bypassed
Asserting power-on reset, negating JCOMP, or negating the Debug_Enable signal, results in
asynchronous entry into reset state. Following negation of power-on reset, the Nexus reset
signal remains asserted until the system clock achieves lock or in bypass mode, as
indicated by the system clock lock status signal, and Debug_Enable is asserted and
JCOMP is asserted. Any subsequent loss of PLL lock does not generate a Nexus reset.
This reset signal is unaffected by other sources of reset.If Debug_Enable is de-asserted by
the SoC security modules, then the DCI holds the debug and trace logic in reset. The
Debug_Enable signal is generated by security logic after functional or destructive reset
based on the device censored mode, the PASS_LOCK3[DBL] control, and the device life
cycle. If the Debug_Enable signal is asserted by the security logic, it is possible to trace
through functional resets
The following table shows how the Nexus reset is asserted/negated based on various
signals.
POR
Assert
X
X
X
Negate
58.1.3.3 System watchdog control
The DCI is also used to enable or disable the Software Watchdog Timer (SWT). The DCI
provides a single bit SWT enable signal which is used to control all SWTs in the MCU. For
this, the EVTI[0] pin is used. If the EVTI[0] pin remains high when the tool asserts JCOMP,
then the SWT is enabled. But if the tool drives the EVTI[0] pin low before asserting JCOMP
pin, then the SWT is disabled. By default the SWT is enabled and a tool has an option to
enable/disable the SWT using the EVTI[0] pin.
58.1.3.4 Break control
The DCI provides central break control among the CPUs and non-CPU debug modules
such as GTM, DMA, Watchdog and other peripherals.
There are various different input sources that provide debug requests:
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Table 965. Nexus reset truth table

JCOMP Debug_Enable
X
Negate
X Disable
X
Assert Enable
DocID027809 Rev 4
PLL lock
X X
X X
X
X Unlocked
Locked
RM0400
Nexus reset
Assert
Assert
Assert
Assert
Negate