Figure 1029.Conceptual View Of The Epu Reset Logic And State Machines - STMicroelectronics SPC572L series Reference Manual

RM0400
The CJTAG module utilizes Type-0, Type-2, Type-3, Type-4, and Type-5 resets.
•
Type-0 – Reset of the TAP.7 by power management logic (power-on reset)
•
Type-1 – Chip level generated Test Reset. (equivalent to Type-2)
•
Type-2 – Externally generated Test Reset (nTRST/nTRST_PD pin)
•
Type-3 – TAP.7 controller generated reset
•
Type-4 – Test-Logic-Reset state
•
Type-5 – TAP.7 Controller TReset Register reset of the CLTAPC
Figure 1029. Conceptual view of the EPU reset logic and state machines
Resets generated
external to the
TAP.7 Controller
Controller Power on Reset
Pin test reset
Chip test reset
Controller reset request
Test-Logic-Reset TAPC state
Test Reset Register
Resets generated
internal to the
TAP.7 Controller
60.5.2.1 Type 5 reset
A Type-5 reset affects only the STL via the nSYS_TRST pin. It is asserted when the
TRESET Register value is a logic 1. This register is set to its inactive state by reset Types 0-
4.
60.5.2.2 Type 4 reset
A Type-4 reset is created by the Test-Logic-Reset state. It does not affect the TAP.7 TAPC
state machine state as this state is the source of this reset, nor does it cause the assertion
of the nSYS_TRST signal. It does however affect the coupling and decoupling of the STL.
The Type-4 reset initializes the TAP.7 registers and most controller state machines. It affects
but does not initialize the control state machine managing TAP.7 controller selection. It also
establishes the default operating conditions.
60.5.2.3 Type 3 reset
A Type-3 reset is created by reset requests generated by the TAP.7 controller. A Type-3
reset performs the functions associated with a Type-4 reset and creates the Test-Logic-
Reset state.
IEEE 1149.7 Compact JTAG Test Access Port Controller (CJTAG)
TAP.7 Controller Resets
Type 0 nSYS_TRST
Type 1
Type 2 Type-0 - Type-4
Type 3
Type-0 - Type-3
Type 4 Type-0 – Type-2
Type 5
DocID027809 Rev 4
To CLTAPC
To Ctlr. TAP state
TAPC_rst
machine.
Registers and most
state machines.
Control state machine
To pin bias
Type-0 TAP.7 power-control
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