STMicroelectronics SPC572L series Reference Manual page 168

Device configuration
Offset
0x0048 DMA_FMSG_TS—DMA Fast Message Time Stamp Read Register
0x004C Reserved
0x0050 DMA_SMSG_BIT3—DMA Serial Message Read Register (Bit 3)
0x0054 DMA_SMSG_BIT2—DMA Serial Message Read Register (Bit 2)
0x0058 DMA_SMSG_TS—DMA Serial Message Time Stamp Read Register
0x005C Reserved
0x0060 CH0_CLK_CTRL—Channel 'n' Clock Control Register
0x0064 CH0_STATUS—Channel 'n' Status Register
0x0068 CH0_CONFIG—Channel 'n' Configuration Register
0x006C Reserved
0x0070 CH1_CLK_CTRL—Channel 'n' Clock Control Register
0x0074 CH1_STATUS—Channel 'n' Status Register
0x0078 CH1_CONFIG—Channel 'n' Configuration Register
0x007C Reserved
0x0080 CH2_CLK_CTRL—Channel 'n' Clock Control Register
0x0084 CH2_STATUS—Channel 'n' Status Register
0x0088 CH2_CONFIG—Channel 'n' Configuration Register
0x008C Reserved
0x0090 CH3_CLK_CTRL—Channel 'n' Clock Control Register
0x0094 CH3_STATUS—Channel 'n' Status Register
0x0098 CH3_CONFIG—Channel 'n' Configuration Register
0x009C – 0x015F Reserved
0x0160 CH0_FMSG_DATA—Channel 'n' Fast Message Register
0x0164 CH0_FMSG_CRC—Channel 'n' Fast Message CRC Register
0x0168 CH0_FMSG_TS—Channel 'n' Fast Message Time Stamp Register
0x016C CH0_SMSG_BIT3—Channel 'n' Serial Message Register (Bit 3)
0x0170 CH0_SMSG_BIT2—Channel 'n' Serial Message Register (Bit 2)
0x0174 CH0_SMSG_TS—Channel 'n' Serial Message Time Stamp Register
0x0178 CH1_FMSG_DATA—Channel 'n' Fast Message Register
0x017C CH1_FMSG_CRC—Channel 'n' Fast Message CRC Register
0x0180 CH1_FMSG_TS—Channel 'n' Fast Message Time Stamp Register
0x0184 CH1_SMSG_BIT3—Channel 'n' Serial Message Register (Bit 3)
0x0188 CH1_SMSG_BIT2—Channel 'n' Serial Message Register (Bit 2)
0x018C CH1_SMSG_TS—Channel 'n' Serial Message Time Stamp Register
0x0190 CH2_FMSG_DATA—Channel 'n' Fast Message Register
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Table 48. SENT receiver memory map(Continued)
DocID027809 Rev 4
Register name
RM0400
SENT 0
X
—
X
X
X
—
X
X
X
—
X
X
X
—
X
X
X
—
X
X
X
—
X
X
X
X
X
X
X
X
X
X
X
X
X