Block Diagrams - STMicroelectronics SPC572L series Reference Manual

Introduction
2.6

Block diagrams

LFAST
Ethernet
& SIPI
Concentrator
S2
32 ADD
32 DATA
Peripheral Bridge
40 MHz
Decorated Storage
32 ADD
32 DATA
Peripheral Cluster
(see Periphery
allocation diagram)
98/2058
DMA CH MUX
16ch eDMA
40 MHz
40 MHz
32 ADD
32 DATA
M2
Cross Bar Switch (AMBA 2.0 v6 AHB)–80 MHz
System Memory Protection Unit (SMPU)
S1
32 ADD
32 DATA
SRAM Control
Decorated Access
32 ADD
32 DATA
SRAM
64 KB
DocID027809 Rev 4
Figure 2. Block diagram
DCI (without
LFAST support)
Overlay Backdoor
for system RAM
NAR
RAM 8 KB
Overlay/Trace
SPU
JTAGM
JTAGC
SWT_3
SWT_2
INTC_2 STM_2
e200z215An3–80 MHz
Core
Scalar SP-FPU
VLE
BIU
Load/Store
32 ADD
32 DATA
M1
M0
S0
32 ADD
32 DATA
Flash Controller
Mini Cache
8 x 128
128-bit Page Line
1.5 MB flash
6 x 256 KB code flash
2 x 16 KB data EEPROM
NVM
RM0400
Nexus 3
Instruction
32 ADD
32 DATA