Device configuration
The MII Management Frame Register (MMFR) is not supported on SPC572Lx.
Note:
The RMII_MODE field is fixed by hardware to '1', and is not configurable by the user.
Refer to
6.7.2
CAN nodes
Table 42
Type
M_CAN
1. Clock calibration based on M_CAN_1 messages
6.7.3
LFAST and SIPI
This section summarizes the module configuration in the controller. For a comprehensive
description of SIPI and LFAST, please reference the specific dedicated chapters for SIPI
and LFAST.
6.7.3.1
Instantiation
The SIPI and LFAST are connected together appearing as a single unit. The LFAST portion
of the two modules allows for high speed inter-device communications. The SIPI allows
memory to be shared between devices which have SIPI and LFAST communication
modules (see
160/2058
Chapter 48: Fast Ethernet Controller (FEC)
lists the number of CAN nodes.
Table 42. CAN bus controllers
Instances
M_CAN_1
M_CAN_2
Figure
14).
DEBUG on CAN support
Yes
Yes
DocID027809 Rev 4
for detailed description.
Clock calibration
RM0400
(1)
Yes
Yes
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