Path From Mc_Rgm Idle With Core Enabled To Watchdog Timer Timeout - STMicroelectronics SPC572L series Reference Manual

Reset and Boot
7.4.4.11 Enter serial boot mode (state 14)
Figure 27: Boot-up sequence, part D
7.4.4.12 Life Cycle check indicates FACTORY (decision point G)
There are two possible settings for the Life Cycle parameter:
•
FIELD indicates that application code has been programmed into the flash memory of
the device. Serial boot mode is exited and IOP enters a 'wait' mode until a watchdog
reset occurs.
•
FACTORY means that there is no application code programmed into the flash memory.
For the present example a setting of FACTORY is assumed.
7.4.4.13 Receive and install application code
Once a serial link is established via the LINFlexD port using a data transmission protocol
defined and implemented in the BAF code, the Serial Boot Loader waits to receive the code.
Note: A software watchdog timer is started by the BAF code. A reset occurs if a program is not
received before the watchdog timer timeout.
1. Configure LINFlexD module and external pins (state 37).
2. Wait for START WORD (state 38).
3. Receive START WORD (state 39).
4. Receive START ADDRESS (state 40).
5. Receive DOWNLOAD SIZE (state 41).
6. Receive CODE (state 42).
7. Branch to START ADDRESS (state 43).
Application code begins at the received START ADDRESS.
7.4.5

Path from MC_RGM IDLE with Core enabled to watchdog timer timeout

Here the operation of the core is desired but there is no valid boot header file and the Life
Cycle variable is set to FIELD, indicating that the device was programmed with application
code and the appropriate boot header files.
This path is only taken if a catastrophic event has occurred or the device is improperly
programmed.
7.4.5.1 Initial conditions
•
Boot Assist Flash bypass mode is not enabled (execute BAF code).
•
A valid boot header for the CPU has not been programmed into flash memory.
–
–
–
–
•
The Life Cycle variable is set to FIELD, indicating a programmed device.
• The MC_RGM has passed control to the SSCM during the IDLE state.
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Boot Header_ID
Boot CPU selection
Boot CPU start address (address of first instruction in application code)
CPU reset vector
DocID027809 Rev 4
shows the boot loader flow.
RM0400