STMicroelectronics SPC572L series Reference Manual page 137

RM0400
IRQ # Offset
LFAST_0 Receive Error combined interrupt:
– Unsolicited frame register overflow
– Rx Data FIFO Minimum Threshold reached
– Rx Data FIFO Max Threshold reached
664 1A60h – Rx Data FIFO Underflow
– Rx Data FIFO Overflow
– Frame with unsupported frame size received
– Invalid ICLC code Received
– Invalid Logical Channel Type
LFAST_0 ICLC receive combined interrupt:
– Ping Frame Response failed
– Ping Frame Response successful
– ICLC Ping Frame Request received
– ICLC frame for Test mode off received
– ICLC frame for Loopback On received
– ICLC frame for Clk Test mode received
– ICLC frame for LFAST Slaves Tx Interface
– Disable received
– ICLC frame for LFAST Slaves Tx Interface
665 1A64h
Enable received
– ICLC frame for LFAST Slaves Rx Interface
fast mode switch received
– ICLC frame for LFAST Slaves Rx Interface
slow mode switch received
– ICLC frame for LFAST Slaves Tx Interface fast
mode switch received
– ICLC frame for LFAST Slaves Tx Interface
slow mode switch received
– ICLC frame for PLL OFF received
– ICLC frame for PLL ON received
JTAG Master combined interrupt:
674 1A88h – Idle interrupt
– Sequence Processing Unit interrupt
JTAG Data Communication combined interrupt:
675 1A8Ch – JDC Input data received
– JDC output data sent
688 1AC0h M_CAN_1 Line0 combined interrupt
689 1AC4h M_CAN_1 Line1 combined interrupt
Table 22. Interrupt sources(Continued)
Source description
DocID027809 Rev 4
Source name
LFAST_0_RISR[RXUOF] |
LFAST_0_RISR[RXMNF] |
LFAST_0_RISR[RXMXF] |
LFAST_0_RISR[RXUFF] |
LFAST_0_RISR[RXOFF] |
LFAST_0_RISR[RXSZF] |
LFAST_0_RISR[RXICF] |
LFAST_0_RISR[RXLCEF]
LFAST_0_RIISR[ICPFF] |
LFAST_0_RIISR[ICPSF] |
LFAST_0_RIISR[ICPRF] |
LFAST_0_RIISR[ICTOF] |
LFAST_0_RIISR[ICLPF] |
LFAST_0_RIISR[ICCTF] |
LFAST_0_RIISR[ICTDF] |
LFAST_0_RIISR[ICTEF] |
LFAST_0_RIISR[ICRFF] |
LFAST_0_RIISR[ICRSF] |
LFAST_0_RIISR[ICTFF] |
LFAST_0_RIISR[ICTSF] |
LFAST_0_RIISR[ICPOFF] |
LFAST_0_RIISR[ICPONF]
JTAGM_SR[SPU_INT] | JTAGM_SR[Idle]
JDC_MSR[JIN_INT] | JDC_MSR[JOUT_INT]
(M_CAN_1_IR[0] & ~M_CAN_1_ILS[0])| ... |
(M_CAN_1_IR[11] & ~M_CAN_1_ILS[11]) |
(M_CAN_1_IR[13] & ~M_CAN_1_ILS[13]) | ... |
(M_CAN_1_IR[31] & ~M_CAN_1_ILS[31])
(M_CAN_1_IR[0] & M_CAN_1_ILS[0])| ... |
(M_CAN_1_IR[11] & M_CAN_1_ILS[11]) |
(M_CAN_1_IR[13] & M_CAN_1_ILS[13]) | ... |
(M_CAN_1_IR[31] & M_CAN_1_ILS[31])
Device configuration
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