Figure 38. Example Of Vdd_Lv Power-Up Sequencing - STMicroelectronics SPC572L series Reference Manual

Power management
Figure 38
PHASE3.
1.080V
1.020V
LVD098_C
0.960V
Figure 39
from POWERUP to PHASE3.
232/2058
provides an example of VDD_LV power-up sequence from POWERUP to

Figure 38. Example of VDD_LV power-up sequencing

POWERUP P0 P1
Power-ON
Flash init
start
LVD108 disabled
(used modules must work at LVD098)
>90mV hysteresis before trimming
illustrates threshold variation of VDD_LV LVD monitor during power-up sequence
DocID027809 Rev 4
P2
LVD Trimming
Available (SSCM)
RM0400
P3
Time LVD
stabilization
when enabled
VDD_LV
1.140V
LVD108_C
1.110V
1.080V
1.020V
LVD098_C
0.960V
t