Security Features - STMicroelectronics SPC572L series Reference Manual

Embedded memories
Figure 5. Flash memory segmentation and read-while-write partitioning
Low Address
Space
High Address
Space
256 KB Address
Space
Note: See Table 9: Flash memory and overlay RAM map
SPC572Lx flash memory map.
3.3.2.3 UTEST memory space
Devices in the SPC572Lx family contain an 8 KB area of One-Time Programmable (OTP)
flash memory for storing test information and device configuration data. See
UTEST flash memory map
memory map..
3.4

Security features

The SPC572Lx architecture uses a combination of device life cycle monitoring and
password protection to limit the conditions under which debugging interfaces can access
certain areas of flash memory.
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Read Partition 0
8 KB UTEST
8 KB BAF
6 x 256 KB
in Chapter 5: Memory map
DocID027809 Rev 4
Read Partition 1
16 KB (block 0)
16 KB (block 1)
2 x 16 KB EEPROM
emulation
Read While Write
partition boundaries
in Chapter 5: Memory map
for the SPC572Lx UTEST flash
RM0400
for the
Table 11: