Security Modules; Password And Device Security Module (Pass) Configuration - STMicroelectronics SPC572L series Reference Manual

Device configuration
Register
RGM_FESS
RGM_PRST0–7
6.7.12.9 System Status and Control Module (SSCM) protected registers
Table 65
Register
ERROR
6.7.12.10 JTAG Master (JTAGM) protected registers
Table 66
Register
JTAGM_MCR
6.8

Security modules

6.8.1

Password and Device Security Module (PASS) configuration

The PASS module is used to implement password-based read and write protection for flash
blocks on the SPC572Lx MCU. Up to four levels of password protection can be
implemented for each flash block.
Note: The registers discussed in this section are initialized via DCF records, so the reset values
depend on user settings.
See the Password and Device Security Module (PASS) chapter for further details.
6.8.1.1 PASS_LOCKn_PGn register bit mapping
Each password group defined in the DCF records has a set of four LOCKn registers
association with it—PASS_LOCKn_PGn. The bits of these registers are associated with
specific flash blocks. The mapping is shown in the following figures.
Note: The PASS module has additional mapping in the LOCK3 register and defines read locking
regions. See the PASS chapter for details.
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Table 64. Protected MC_RGM registers(Continued)
Register size (bits)
32
32
lists the SSCM registers that can be protected.
Table 65. Protected SSCM registers
Register size (bits)
16
lists the JTAGM registers that can be protected.
Table 66. Protected JTAGM registers
Register Size (bits)
32
DocID027809 Rev 4
Offset from module
base address
0x340
0x610–62C
Offset from module
base address
0x0006
Offset from Module
Base Address
0x00
RM0400
Protected size (bits)
32
32
Protected size (bits)
16
Protected Size (bits)
32