Figure 39. Threshold Variation During Power-Up Sequence - STMicroelectronics SPC572L series Reference Manual

RM0400
POWERUP P0 P1
1.440 V
1.380 V
1.320 V
1.275 V
1.250V
1.225 V
1.200 V
1.180 V
1.140 V
1.080 V
1.050 V
0.960 V
9.6.1.2.2 VDD_HV conditions and LVD trimming/enabling sequence
During POWERUP, the following high voltage LVDs are enabled:
•
LVD400_IM
•
LVD270
The VDD_HV conditions to exit POWERUP are the following:
•
LVD400_IM upper threshold is crossed.
•
LVD290_F upper threshold is crossed.
•
LVD270 upper threshold is crossed.

Figure 39. Threshold variation during power-up sequence

P2
50 mV hysteresis
+40 mV max internal drop
MAX THRESHOLD
50 mV hysteresis
+40 mV max internal drop
MIN THRESHOLD
DocID027809 Rev 4
Power management
P3
+11%
+4%
+2%
–4%
–9%
LVD
Fully functional
Functional Margin
Reliability restriction
Out of spec
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