Device configuration
Address offset
034h
038h
040h–05Ch
05Ch–85Ch
6.3.6.2
Interrupt sources
Table 22
specifically listed are not used.
IRQ # Offset
0
1000h Software settable flag 0
1
1004h Software settable flag 1
2
1008h Software settable flag 2
3
100Ch Software settable flag 3
4
1010h Software settable flag 4
5
1014h Software settable flag 5
6
1018h Software settable flag 6
7
101Ch Software settable flag 7
8
1020h Software settable flag 8
9
1024h Software settable flag 9
10
1028h Software settable flag 10
11
102Ch Software settable flag 11
12
1030h Software settable flag 12
13
1034h Software settable flag 13
14
1038h Software settable flag 14
15
103Ch Software settable flag 15
16
1040h Software settable flag 16
17
1044h Software settable flag 17
18
1048h Software settable flag 18
19
104Ch Software settable flag 19
20
1050h Software settable flag 20
21
1054h Software settable flag 21
22
1058h Software settable flag 22
128/2058
Table 21. INTC implemented registers(Continued)
Reserved
Reserved
INTC Software Set/Clear Interrupt Register 0 (INTC_SSCIR0) –
INTC Software Set/Clear Interrupt Register 31 (INTC_SSCIR31)
INTC Priority Select Register 0 (INTC_PSR0) –
INTC Priority Select Register 1023 (INTC_PSR1023)
defines the interrupt sources for the INTC on this chip. All IRQ numbers not
Table 22. Interrupt sources
Source description
DocID027809 Rev 4
Register
Source name
SSCIR0_3[CLR0]
SSCIR0_3[CLR1]
SSCIR0_3[CLR2]
SSCIR0_3[CLR3]
SSCIR4_7[CLR4]
SSCIR4_7[CLR5]
SSCIR4_7[CLR6]
SSCIR4_7[CLR7]
SSCIR8_11[CLR8]
SSCIR8_11[CLR9]
SSCIR8_11[CLR10]
SSCIR8_11[CLR11]
SSCIR12_15[CLR12]
SSCIR12_15[CLR13]
SSCIR12_15[CLR14]
SSCIR12_15[CLR15]
SSCIR16_19[CLR16]
SSCIR16_19[CLR17]
SSCIR16_19[CLR18]
SSCIR16_19[CLR19]
SSCIR20_23[CLR20]
SSCIR20_23[CLR21]
SSCIR20_23[CLR22]
RM0400
Need help?
Do you have a question about the SPC572L series and is the answer not in the manual?