Feature List - STMicroelectronics SPC572L series Reference Manual

Introduction
•
Fast Ethernet Controller (FEC)
•
Fast Asynchronous Serial Transmission (LFAST)
•
Nexus Development Interface (NDI) per IEEE-ISTO 5001-2003 standard, with some
support for 2010 standard
•
Device and board test support per Joint Test Action Group (JTAG) (IEEE 1149.1 and
IEEE 1149.7)
• On-chip voltage regulator controller manages the supply voltage down to 1.2 V for core
logic
•
Self-test capability
Note: The source clock for this device can be: external oscillator, external crystal or 16 MHz
internal RC oscillator (IRCOSC)
2.3

Feature list

Table 2 lists a summary of major features for the SPC572Lx device. The feature column
represents a combination of module names and capabilities of certain modules. A detailed
description of the functionality provided by each on-chip module is given later in this
document.
Process
Main processor Core
Number of main cores
Single precision floating point
VLE
Main processor frequency
SMPU
Software watchdog timer (task SWT/safety SWT)
Core Nexus class
Sequence processing unit (SPU)
System SRAM
Flash memory
Flash memory fetch accelerator
Data flash memory (EEPROM)
Flash memory overlay RAM
DMA channels
LINFlexD (UART/MSC)
M_CAN/M_TTCAN
DSPI (SPI/MSC/sync SCI)
Microsecond bus downlink
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Table 2. SPC572L64 device feature summary
Feature
DocID027809 Rev 4
RM0400
Description
55 nm
e200z2
1
Yes
Yes
80 MHz
Yes
2 (1/1)
3
Yes
64 KB
1536 KB
8 × 128 bit
2 × 16 KB
8 KB
16
3 (2/1)
2/0
2 (1/1/0)
Yes