Device Trimming; Supply Monitoring (Por And Lvds); Power-On Reset (Por); Behavior Of Device Lvds - STMicroelectronics SPC572L series Reference Manual

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9.4

Device trimming

During the initialization phase, the device defaults to a pre-determined state for each of the
LVDs. As the flash becomes available, the differential read process allows the trimming data
to be available for the internal LVDs. Refer to <Cross Refs>Section 9.6, Power sequence for
further details.
9.5

Supply monitoring (POR and LVDs)

The POR and LVD circuits function correctly even if the input voltage is non monotonic and
hold the device in reset until release requisites are met.
9.5.1

Power-on reset (POR)

The PMC implements two internal power-on reset circuits:
•
PORUP_LV monitors the voltage on the 1.2 V input VDD_LV_CORE pin and asserts a
reset when the input supply is below defined values.
•
PORUP_HV monitors the voltage on the 5.0 V input VDD_HV_PMC pin. The POR trip
point is set high enough to ensure all the LVD circuits are functional.
See Chapter 7: Reset and Boot
9.5.2

Behavior of device LVDs

After reset, some LVDs can be disabled (see section
(LVD)) or used in a 'monitor' only mode, as well as generating a safe/interrupt event.
Figure 37
to device initialization and subsequent 'normal' run or operating mode.
After initialization, the LVDs can be configured to operate with a higher voltage range by
preventing threshold breaches from triggering resets. The application must ensure that the
supply remains in the functional range.
illustrates the behavior of internal LVD circuits from the power-on phase through
DocID027809 Rev 4
for PORST/ESR0 pin functionality.
Section 9.5.3: Low Voltage Detection
Power management
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