STMicroelectronics SPC572L series Reference Manual page 120

Device configuration
Mnemonic
ESR Exception Syndrome Register
IVPR Interrupt Vector Prefix Register
User SPR General 0
USPRG0
(VRSAVE)
(renamed to VRSAVE in PowerISA 2.06)
SPRG0 SPR General 0
SPRG1 SPR General 1
SPRG2 SPR General 2
SPRG3 SPR General 3
PIR Processor ID Register
PVR Processor Version Register
DBSR Debug Status Register
DBCR0 Debug Control Register 0
DBCR1 Debug Control Register 1
DBCR2 Debug Control Register 2
IAC1 Instruction Address Compare 1
IAC2 Instruction Address Compare 2
IAC3 Instruction Address Compare 3
IAC4 Instruction Address Compare 4
DAC1 Data Address Compare 1
DAC2 Data Address Compare 2
DVC1 Data Value Compare 1
DVC2 Data Value Compare 2
SPEFSCR EFP APU status and control register
L1CFG0 L1 cache configuration register 0
L1CFG1 L1 cache configuration register 1
NPIDR Nexus 3 Process ID register
DBCR3 Debug control register 3
DBCR4 Debug control register 4
DBCR5 Debug control register 5
IAC5 Instruction Address Compare 5
IAC6 Instruction Address Compare 6
IAC7 Instruction Address Compare 7
IAC8 Instruction Address Compare 8
MCSRR0 Machine Check Save/Restore Register 0
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Table 13. Special purpose registers(Continued)
Name
(2)
2
DocID027809 Rev 4
SPR
Access
number
62 R/W
63 R/W
256 R/W
272 R/W
273 R/W
274 R/W
275 R/W
286 R/W
287 Read-only
Read/Clear
304
(1)
308 R/W
309 R/W
310 R/W
312 R/W
313 R/W
314 R/W
315 R/W
316 R/W
317 R/W
318 R/W
319 R/W
512 R/W
515 Read-only
516 Read-only
517 R/W
561 R/W
563 R/W
564 R/W
565 R/W
566 R/W
567 R/W
568 R/W
570 R/W
RM0400
e200z
Privileged
specific
Yes No
Yes No
No No
Yes No
Yes No
Yes No
Yes No
Yes No
Yes No
Yes No
Yes No
Yes No
Yes No
Yes No
Yes No
Yes No
Yes No
Yes No
Yes No
Yes No
Yes No
No No
No Yes
No Yes
No Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes