STMicroelectronics SPC572L series Reference Manual page 103

RM0400
3.3.2.1 Features
•
Flash segmentation
–
–
–
•
Flash memory protection: write protection and OTP function available for each block
• Test and initialization data stored in a non-volatile 8 KB OTP UTEST block
•
ECC with double bit detection, single bit correction
Erase suspend, program suspend, and erase-suspended program all supported
3.3.2.2 Flash organization
The embedded flash memory consists of three address spaces in three groupings:
•
16 KB low address space
•
16 KB high address space
•
256 KB address space
Address space group (low- or high-address space) determines which registers/fields are
used to select blocks for modify operations or lock them from modify operations. Each
address space is independent.
The flash module is further divided into two partitions that determine locations for valid read-
while-write (RWW) operations. While the embedded flash memory is performing a "write"
(program or erase) to a given partition, it can simultaneously read from the other partition.
•
For program operations, only the address specified by an interlock write determines the
partition being written (block locking and block select registers do not determine the
RWW partitions being written).
•
For erase operations, only blocks that are selected and unlocked determine the RWW
partitions being written.
Figure 5
devices.
256 KB blocks provided for code or data
Two 16 KB blocks provided for EEPROM emulation
Support for reading-while-writing when the accesses are to different partitions
shows the flash block segmentation and read-while-write partitioning for SPC572Lx
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Embedded memories
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