Texas Instruments OMAP5912 Reference Manual page 1167

Multimedia processor device overview and architecture
Hide thumbs Also See for OMAP5912:
Table of Contents

Advertisement

MicroWire Interface
Table 42. Setup Register 1 (SR1) (Continued)
Bit
Name
5
CS0_CHK
4:3
CS0_FRQ
2
CS0CS_LVL
1
CS0_EDGE_WR
0
CS0_EDGE_RD
Note:
Content of this register must not be changed when a read or write process is running.
102
Serial Interfaces
Base Address = 0xFFFB 3000, Offset = 0x08
Function
Before activating a write process, checks if external
device is ready.
0: No check is done and the write process is
immediately executed.
1: If DI signal is low, the interface considers the
external component busy; if DI is high, the interface
considers the first external component ready and
starts the write process.
Used when CS0 is selected.
Defines the frequency of the serial clock SCLK
when CS0 is selected (F_INT is the frequency of
the internal clock).
00: F_INT/2
01: F_INT/4
10: F_INT/8
11: Undefined
Defines the active level of the chip-select by CS0
When CS0 is selected, defines the active edge of
the serial clock SCLK used to write data to the
serial input D0.
(Output data is generated on this edge)
0: Falling (serial clock not inverted)
0: Rising (when serial clock inverted)
1: Rising (serial clock not inverted)
Falling (when serial clock inverted)
1:
When CS0 is selected, defines the active edge of
the serial clock SCLK used to read data from the
serial input DI.
(Input data is strobed on this edge)
0: Falling (serial clock not inverted)
0: Rising (when serial clock inverted
1: Rising (serial clock not inverted)
1: Falling (when serial clock inverted)
Table 42 sets up the serial interface for the first and second external
components.
Reset
Undefined
Undefined
0
Undefined
Undefined
)
SPRU760B

Advertisement

Table of Contents
loading

Table of Contents