Figure 1113.Nar Status Register (Nar_St) - STMicroelectronics SPC572L series Reference Manual

RM0400
Field
8 Reserved
Alternate Port. Defines which port is the target for non-filtered messages; main port in single-port
applications.
7–6
00 No alternate port. Running in trace-buffer mode.
ALT 01 Aurora out is the ALT
10 Trace memory bus is the ALT
11 Reserved
5 Reserved
Automatic Flush Accumulators.
4
0 Output queue accumulators do not flush stranded beats
AFA
1 Accumulators automatically flush stranded beats
3 Reserved. This bit must be written with 0.
2 Reserved and must be written with 0.
Power-Up Suppressed.
1
0 NAR powers up active
PUS
1 NAR powers up in global suppressed mode
NAR Soft Reset.
0
1 Resets all configuration registers and sets queue address pointers to the top of their respective
NSR
queues. Also resets itself after a single-cycle delay. (This does not affect other blocks)
65.4.1.2 NAR status register (NAR_ST)
The NAR_ST register provides information on NAR activity and queue status, as well as
HBDP status and errors. It is a read-only register. The following figure shows the format of
the NAR_ST.
Register index: 1
31 30
R NEN NUM
W
Reset 0 0
15 14
R HPR HPE MPE MOV
W w1c
Reset 0 0
The NAR_ST register is described in the following table.
Table 1050. NAR_CR field descriptions(Continued)
29 28 27 26
NCE
0 0 0 0
13 12 11 10
0 TOV
w1c w1c w1c
0 0 0 0
Figure 1113. NAR status register (NAR_ST)
DocID027809 Rev 4
Description
25 24 23 22
0 0
0 0 0 0
9 8 7 6
0 0 0 0
Nexus Aurora Router (NAR)
21 20 19 18
0 0 0 0
0 0 0 0
5 4 3 2
QWA
0 0 0 0
17 16
0 0
0 0
1 0
0 1
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