Trace Memory Bus Configuration Registers - STMicroelectronics SPC572L series Reference Manual

RM0400
Field
22
FE1
21–16
TF1
15
16
FE2
13–8
TF2
7
6
FE3
5–0
SF3
65.4.3

Trace memory bus configuration registers

The trace memory bus can be used to transfer debug messages out to a dedicated block of
external memory space. The trace memory bus configuration registers are used to specify
the location and size of the external debug space.
65.4.3.1 Trace memory bus base address registers (NAR_TBALO and NAR_TBAHI)
The trace memory bus base address registers determine where Nexus data sent out
through the trace memory bus goes. The NAR sends out blocks of data on the trace
memory bus, writing to an address block defined by the specified base address. Data can
transmitted either on an as-available, word-wide basis, or in larger blocks. In block transfer
mode, the size of the data block is determined by the BTM field of the Control Register; the
default is 64 bytes. Even if block transfer mode is not used, the 5, 6, 7, or 8 (depending on
the BTS field in NAR_TCR register) LSBs of the base address are not accessible. This
forces the debug memory space to be aligned to a block boundary.
When read, the address registers return the current address, allowing the user to monitor
the progress of a trace memory transfer. The following figures show the format of the trace
memory base address registers (NAR_TBALO and NAR_TBAHI). For a description of the
allowed address for these registers, see the Calibration and Debug configuration chapter
which describes how the modules are configured.
Table 1053. NAR_TFR field descriptions(Continued)
Enable Filter 1.
0 Filter 1 disabled. TF1 ignored
1 Filter 1 enabled and contained in TF1
Type Filter 1. The message TCODE is compared with this field. See
Output arbitration for an example.
Reserved
Enable Filter 2.
0 Filter 2 disabled. TF2 ignored
1 Filter 2 enabled and contained in TF2
Type Filter 2. The message TCODE is compared with this field. See
Output arbitration for an example.
Reserved
Enable Filter 3.
0 Filter 3 disabled. TF3 ignored
1 Filter 3 enabled and contained in TF3
Type Filter 3. The message TCODE is compared with this field. See
Output arbitration for an example.
DocID027809 Rev 4
Nexus Aurora Router (NAR)
Description
Section 65.5.6,
Section 65.5.6,
Section 65.5.6,
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