Frame Adjustment Counter
8.2.1
Synchronization
Figure 85.
FAC Module Counters and Clock Synchronization
FARC
REG
FSC
REG
System clock
218
Serial Interfaces
The synchronization mechanism is based on the assumption that the system
clock is running at least eight times faster than frame synchronization and
frame start. Figure 85 and Figure 86 show the synchronization logic and the
counter hookup.
Frame sync
counter
Frame start
counter
FSM
EN
Sync circuit
EN
Sync circuit
Frame sync
Frame start
SPRU760B