Texas Instruments OMAP5912 Reference Manual page 1403

Multimedia processor device overview and architecture
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Figure 4.
Non-Isochronous, Non-Control OUT Transaction Phases and Interrupts
Successful data transfer from USB host. (Occurs because the endpoint
STAT_FLG.FIFO_EN bit was set when token was received)
Token
After interrupt, EP's RX FIFO contains received data.
No data accepted by DSP. (Occurs because the endpoint STAT_FLG.FIFO_EN bit
was clear when token was received)
Token
After interrupt, EP RX FIFO is empty.
EP stalled. No data accepted by DSP. (Occurs because the endpoint
request error has occured.)
STAT_FLG.EP_HALTED bit was set when Token was received or because an EPO control
Token
After interrupt, EP RX FIFO is empty.
Bad data received. No data accepted by DSP. (Occurs because of CRC error, PID
check error, bit stuffing error, or overrun conditions).
Token
No EPx RX Interrupt occurs. EP RX FIFO is empty. STAT_FLG is not
updated.
Indicates a packet received by the device
Indicates a packet sent by the device
SPRU761A
Data
Data
Data
No handshake
Data
USB Device Controller
STAT_FLG bits after
ACK
EPx Rx Interrupt
0
STAT_FLG bits after
(SYSCON1.Nak_En =1)
NAK
EPx RX Interrupt
(SYSCON1.Nak_En=1)
0
STAT_FLG bits after
STALL
EPx RX Interrupt
1
or
0
sent
Universal Serial Bus (USB)
interrupt
0
0
1
interrupt
0
1
0
interrupt
1
0
0
1
0
0
111

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