Texas Instruments OMAP5912 Reference Manual page 1330

USB Host Controller
Table 13. HC Current Bulk Register (HCBULKCURRENTED)
Bit Name
31:4 BCED
3:0 Reserved
Table 14. HC Head Done Register (HCDONEHEAD)
Bit Name Description
31:4 DH Physical address of the last TD that has added to the done
queue.
This field represents bits 31:4 of the physical address of the
top TD on the done TD queue. TDs are assumed to begin at
16-byte-aligned address, so bits 3:0 of this pointer are
assumed to be 0.
A value of 0x00000000 indicates that there are no TDs on
the done queue.
The USB host controller automatically updates this register.
3:0 Reserved Reserved
38 Universal Serial Bus (USB)
Description
Physical address of current ED on the bulk ED list
This field represents bits 31:4 of the physical address of the
next ED on the bulk ED list. EDs are assumed to begin at
16-byte-aligned address, so bits 3:0 of this pointer are
assumed to be 0. See Section 2.9, Physical Addressing, for
the restrictions on physical addresses.
A value of 0x0000000 indicates that the USB host controller
has reached the end of the bulk ED list without finding any
transfers to process.
The USB host controller automatically updates this register.
Reserved
The head done register defines the physical address of the current head of the
done TD queue.
The frame interval register defines the number of 12-MHz clock pulses in each
USB frame.
Type Reset
R/W 0x0000000
R 0x0
Type Reset
R 0x0000000
R 0x0
SPRU761A