Texas Instruments OMAP5912 Reference Manual page 1378

USB Device Controller
Table 40. Device Status Register (DEVSTAT) (Continued)
Bit Name
1 DEF
0 ATT
86 Universal Serial Bus (USB)
Description
The default state bit returns 1 when the USB device is attached to
the USB and powered, and has been reset. This bit remains set to 1
until the device becomes de-powered. The device moves into
default state as soon as the USB reset is effective.
0: Not in default
1: Default
The value after MPU is low, and after USB reset is high.
The attached state bit returns 1 when the device is attached to the
USB and is powered. This bit remains set to 1 until the device
powers down.
0: Not attached
1: Attached
The value after USB device controller hardware reset is low
(unattached) or high (attached), and after USB reset is high.
This read-only register provides a status reflecting the visible device states as
defined in USB1.1 Specification. A write to this register has no effect.
Note:
This register is double buffered. If IRQ_EN.DS_CHG_IE is set (interrupt
enabled), the background register is moved into foreground position only af-
ter clearing any pending DS_CHG interrupt. Therefore, if there is a state
change and a pending DS_CHG interrupt has not been serviced yet, then the
recent state change is not visible, because the background register was only
updated and not moved into the foreground position.
The values depend on whether the reset action comes from the USB device
controller (MPU) or USB host. They also depend on whether the device is
attached or not when the USB device controller hardware reset event occurs.
SPRU761A